Faculty

John L. Hennessy, inaugural director of the Knight-Hennessy Scholars Program and president emeritus of Stanford, has been elected an international fellow of the Royal Academy of Engineering, the national academy for engineering in the United Kingdom.

Founded in 1976, the Royal Academy of Engineering brings together the most successful and talented engineers for a shared purpose: to advance and promote excellence in engineering. Earlier this week, the academy announced 50 new fellows, two international fellows, including Hennessy, and one honorary fellow.

Hennessy, a pioneer in computer architecture, said the honor held special significance because so many early pioneers in the field did their great work in England, from Alan Turing (1912-1954), a mathematician who conceived of modern computing and played a crucial role in the Allied victory over Nazi Germany in WWII, to Maurice Wilkes (1913-2010), a professor at Cambridge University who is considered the most important figure in the development of practical computing in the United Kingdom.

"I have had the pleasure of knowing many colleagues who are members of the Royal Academy of Engineering, including Wilkes, a colleague from Cambridge who I knew personally for many years," Hennessy said. "It is an honor to join such an august group."

Hennessy has won numerous awards for his work, including election to the National Academy of Engineering and the National Academy of Sciences. He is also a fellow of the American Academy of Arts and Sciences, the Association for Computing Machinery, and the Institute of Electrical and Electronics Engineers.

After stepping down as president of Stanford a year ago, Hennessy became the Shriram Family Director of the Knight-Hennessy Scholars Program, which is the largest fully endowed graduate-level scholarship program in the world. The program, which is currently located in the Littlefield Center, held a groundbreaking ceremony last spring for its future home, Denning House. Currently, the program is accepting applications for its first class of 50 scholars, who will begin their studies in the fall of 2018.

Hennessy joined Stanford's faculty in 1977 as an assistant professor of electrical engineering. In 1981, he drew together researchers to focus on a technology known as RISC (reduced instruction set computer), which revolutionized computing by increasing performance while reducing costs. Hennessy helped transfer this technology to industry. In 1984, he cofounded MIPS Computer Systems, now MIPS Technologies, which designs microprocessors.

Hennessy, who rose through the academic ranks at Stanford and became a full professor in 1986, served as chair of the Department of Computer Science and took the helm as dean of the School of Engineering in 1996. He became provost in 1999 and was inaugurated as Stanford's 10th president in 2000. He stepped down from the presidency in 2016.

As president, Hennessy fostered interdisciplinary collaboration, launching university-wide initiatives in human health, environmental sustainability, international affairs, the arts and creativity, and greatly expanding opportunities for multidisciplinary teaching and learning. Under his leadership, the campus underwent a physical transformation to support 21st-century research and teaching needs, including cutting-edge facilities for the Graduate School of Business, the Law School, the Science and Engineering Quadrangle, Stanford Medicine and the Arts District.

Reprinted from Stanford News, "John L. Hennessy elected to Royal Academy of Engineering," September 7, 2017.

One day soon we may live in smart houses that cater to our habits and needs, or ride in autonomous cars that rely on embedded sensors to provide safety and convenience. But today's electronic devices may not be able handle the deluge of data such applications portend because of limitations in their materials and design, according to the authors of a Stanford-led experiment recently published in Nature.

To begin with, silicon transistors are no longer improving at their historic rate, which threatens to end the promise of smaller, faster computing known as Moore's Law. A second and related reason is computer design, say senior authors and Stanford EE professors Subhasish Mitra and H.-S. Philip Wong. Today's computers rely on separate logic and memory chips. These are laid out in two dimensions, like houses in a suburb, and connected by tiny wires, or interconnects, that become bottlenecked with data traffic.

Now, the Stanford team has created a chip that breaks this bottleneck in two ways: first, by using nanomaterials not based on silicon for both logic and memory, and second, by stacking these computation and storage layers vertically, like floors in a high-rise, with a plethora of elevator-like interconnects between the "floors" to eliminate delays. "This is the largest and most complex nanoelectronic system that has so far been made using the materials and nanotechnologies that are emerging to leapfrog silicon," said Mitra.

The team, whose other Stanford members include EE professors Roger Howe and Krishna Saraswat, integrated over 2 million non-silicon transistors and 1 million memory cells, in addition to on-chip sensors for detecting gases – a proof of principle for other tasks yet to be devised. "Electronic devices of these materials and three-dimensional design could ultimately give us computational systems 1,000 times more energy-efficient than anything we can build of silicon," Wong said.

First author Max Shulaker (PhD '16), who performed this work while a PhD candidate, is now an assistant professor at MIT and core member of its Microsystems Technology Laboratories. He explained in a single word why the team had to use emerging nanotechnologies and not conventional silicon technologies to achieve the high-rise design: heat. "Building silicon transistors involves temperatures of over 1,000 degrees Celsius," Shulaker said. "If you try to build a second layer on top of the first, you'll damage the bottom layer. This is why chips today have a single layer of circuitry."

The magic of the materials

The new prototype chip is a radical change from today's chips because it uses multiple nanotechnologies that can be fabricated at relatively low heat, Shulaker explained. Instead of relying on silicon-based transistors, the new chip uses carbon nanotubes, or CNTs, to perform computations. CNTs are sheets of 2-D carbon formed into nanocylinders. The new Naturepaper incorporates prior ground-breaking work by this team in developing the world's first all-CNT computer.

The memory component of the new chip also relied on new processes and materials improved upon by this team. Called resistive random-access memory (RRAM), this is a type of nonvolatile memory — meaning that it doesn't lose data when the power is turned off – that operates by changing the resistance of a solid dielectric material.

The key in this work is that CNT circuits and RRAM memory can be fabricated at temperatures below 200 Celsius. "This means they can be built up in layers without harming the circuits beneath," Shulaker says. "This truly is a remarkable feat of engineering," says Barbara De Salvo, scientific director at CEA-LETI, France, an international expert not connected with this project.

The RRAM and carbon nanotubes are built vertically over one another, making a new, dense 3-D computer architecture with interleaving layers of logic and memory. By inserting a plethora of wires between these layers, this 3-D architecture promises to address the communication bottleneck. "In addition to improved devices, 3-D integration can address another key consideration in systems: the interconnects within and between chips," Saraswat said.

To demonstrate the potential of the technology, the researchers placed over a million carbon nanotube-based sensors on the surface of the chip, which they used to detect and classify ambient gases.

Due to the layering of sensing, data storage and computing, the chip was able to measure each of the sensors in parallel and then write directly into its memory, generating huge bandwidth without risk of hitting a bottleneck, because the 3-D design made it unnecessary to move data between chips. In fact, even though Shulaker built the chip using the limited capabilities of an academic fabrication facility, the peak bandwidth between vertical layers of the chip could potentially approach and exceed the peak memory bandwidth of the most sophisticated silicon-based technologies available today.

System benefits

This provides several simultaneous benefits for future computing systems.

"As a result, the chip is able to store massive amounts of data and perform on-chip processing to transform a data deluge into useful information," Mitra says.

Energy efficiency is another benefit. "Logic made from carbon nanotubes will be ten times more energy efficient as today's logic made from silicon," Wong said. "RRAM can also be denser, faster and more energy-efficient than the memory we use today."

Thanks to the ground-breaking approach embodied by the Nature paper, the work is getting attention from leading scientists who are not directly connected with the research. Jan Rabaey, a professor of electrical engineering and computer sciences at the University of California, Berkeley, said 3-D chip architecture is such a fundamentally different approach that it may have other, more futuristic benefits to the advance of computing. "These [3-D] structures may be particularly suited for alternative learning-based computational paradigms such as brain-inspired systems and deep neural nets," Rabaey said, adding, "The approach presented by the authors is definitely a great first step in that direction."

This work was funded by the Defense Advanced Research Projects Agency, National Science Foundation, Semiconductor Research Corporation, STARnet SONIC and member companies of the Stanford SystemX Alliance.

This story is a revised version of a press release by MIT News correspondent Helen Knight.

The next generation of feature-filled and energy-efficient electronics will require computer chips just a few atoms thick. For all its positive attributes, trusty silicon can't take us to these ultrathin extremes.

Now, electrical engineers at Stanford have identified two semiconductors – hafnium diselenide and zirconium diselenide – that share or even exceed some of silicon's desirable traits, starting with the fact that all three materials can "rust."

"It's a bit like rust, but a very desirable rust," said Eric Pop, an associate professor of electrical engineering, who co-authored with post-doctoral scholar Michal Mleczko a paper that appears in the journal Science Advances.

The new materials can also be shrunk to functional circuits just three atoms thick and they require less energy than silicon circuits. Although still experimental, the researchers said the materials could be a step toward the kinds of thinner, more energy-efficient chips demanded by devices of the future.

Silicon's strengths
Silicon has several qualities that have led it to become the bedrock of electronics, Pop explained. One is that it is blessed with a very good "native" insulator, silicon dioxide or, in plain English, silicon rust.

Exposing silicon to oxygen during manufacturing gives chip-makers an easy way to isolate their circuitry. Other semiconductors do not "rust" into good insulators when exposed to oxygen, so they must be layered with additional insulators, a step that introduces engineering challenges. Both of the diselenides the Stanford group tested formed this elusive, yet high-quality insulating rust layer when exposed to oxygen.

Not only do both ultrathin semiconductors rust, they do so in a way that is even more desirable than silicon. They form what are called "high-K" insulators, which enable lower power operation than is possible with silicon and its silicon oxide insulator.

As the Stanford researchers started shrinking the diselenides to atomic thinness, they realized that these ultrathin semiconductors share another of silicon's secret advantages: the energy needed to switch transistors on – a critical step in computing, called the band gap – is in a just-right range. Too low and the circuits leak and become unreliable. Too high and the chip takes too much energy to operate and becomes inefficient. Both materials were in the same optimal range as silicon.

All this and the diselenides can also be fashioned into circuits just three atoms thick, or about two-thirds of a nanometer, something silicon cannot do.

The combination of thinner circuits and desirable high-K insulation means that these ultrathin semiconductors could be made into transistors 10 times smaller than anything possible with silicon today.

"Silicon won't go away. But for consumers this could mean much longer battery life and much more complex functionality if these semiconductors can be integrated with silicon," Pop said.

More work to do
There is much work ahead. First, Mleczko and Pop must refine the electrical contacts between transistors on their ultrathin diselenide circuits. "These connections have always proved a challenge for any new semiconductor, and the difficulty becomes greater as we shrink circuits to the atomic scale," Mleczko said.

They are also working to better control the oxidized insulators to ensure they remain as thin and stable as possible. Last, but not least, only when these things are in order will they begin to integrate with other materials and then to scale up to working wafers, complex circuits and, eventually, complete systems.

"There's more research to do, but a new path to thinner, smaller circuits – and more energy-efficient electronics – is within reach," Pop said.

Reprinted from Stanford Magazine, "New semiconductor materials exceed some of silicon's 'secret' powers," August 14,2017

It looks like a regular roof, but the top of the Packard Electrical Engineering Building at Stanford University has been the setting of many milestones in the development of an innovative cooling technology that could someday be part of our everyday lives.

Since 2013, Shanhui Fan, professor of electrical engineering, and his students and research associates have employed this roof as a testbed for a high-tech mirror-like optical surface that could be the future of lower-energy air conditioning and refrigeration.

Research published in 2014 first showed the cooling capabilities of the optical surface on its own. Now, Fan and former research associates Aaswath Raman and Eli Goldstein, have shown that a system involving these surfaces can cool flowing water to a temperature below that of the surrounding air. The entire cooling process is done without electricity.

"This research builds on our previous work with radiative sky cooling but takes it to the next level. It provides for the first time a high-fidelity technology demonstration of how you can use radiative sky cooling to passively cool a fluid and, in doing so, connect it with cooling systems to save electricity," said Raman, who is co-lead author of the paper detailing this research, published in Nature Energy Sept. 4, 2017.

Together, Fan, Goldstein and Raman have founded the company SkyCool Systems, which is working on further testing and commercializing this technology.

Radiative sky cooling is a natural process that everyone and everything does, resulting from the moments of molecules releasing heat. You can witness it for yourself in the heat that comes off a road as it cools after sunset. This phenomenon is particularly noticeable on a cloudless night because, without clouds, the heat we and everything around us radiates can more easily make it through Earth's atmosphere, all the way to the vast, cold reaches of space.

"If you have something that is very cold – like space – and you can dissipate heat into it, then you can do cooling without any electricity or work. The heat just flows," explained Fan, who is senior author of the paper. "For this reason, the amount of heat flow off the Earth that goes to the universe is enormous."

Although our own bodies release heat through radiative cooling to both the sky and our surroundings, we all know that on a hot, sunny day, radiative sky cooling isn't going to live up to its name. This is because the sunlight will warm you more than radiative sky cooling will cool you. To overcome this problem, the team's surface uses a multilayer optical film that reflects about 97 percent of the sunlight while simultaneously being able to emit the surface's thermal energy through the atmosphere. Without heat from sunlight, the radiative sky cooling effect can enable cooling below the air temperature even on a sunny day.

A fluid-cooling panel designed at Stanford being tested on the roof of the Packard Electrical Engineering Building
Photo credit: Aaswath Raman

The experiments published in 2014 were performed using small wafers of a multilayer optical surface, about 8 inches in diameter, and only showed how the surface itself cooled. Naturally, the next step was to scale up the technology and see how it works as part of a larger cooling system.

Putting radiative sky cooling to work
For their latest paper, the researchers created a system where panels covered in the specialized optical surfaces sat atop pipes of running water and tested it on the roof of the Packard Building in September 2015. These panels were slightly more than 2 feet in length on each side and the researchers ran as many as four at a time. With the water moving at a relatively fast rate, they found the panels were able to consistently reduce the temperature of the water 3 to 5 degrees Celsius below ambient air temperature over a period of three days.

The researchers also applied data from this experiment to a simulation where their panels covered the roof of a two-story commercial office building in Las Vegas – a hot, dry location where their panels would work best – and contributed to its cooling system. They calculated how much electricity they could save if, in place of a conventional air-cooled chiller, they used vapor-compression system with a condenser cooled by their panels. They found that, in the summer months, the panel-cooled system would save 14.3 megawatt-hours of electricity, a 21 percent reduction in the electricity used to cool the building. Over the entire period, the daily electricity savings fluctuated from 18 percent to 50 percent.

Broad applicability in the years to come
Right now, SkyCool Systems is measuring the energy saved when panels are integrated with traditional air conditioning and refrigeration systems at a test facility, and Fan, Goldstein and Raman are optimistic that this technology will find broad applicability in the years to come.

The researchers are focused on making their panels integrate easily with standard air conditioning and refrigeration systems and they are particularly excited at the prospect of applying their technology to the serious task of cooling data centers.

Fan has also carried out research on various other aspects of radiative cooling technology. He and Raman have applied the concept of radiative sky cooling to the creation of an efficiency-boosting coating for solar cells. With Yi Cui, a professor of materials science and engineering at Stanford and of photon science at SLAC National Accelerator Laboratory, Fan developed a cooling fabric.

"It's very intriguing to think about the universe as such an immense resource for cooling and all the many interesting, creative ideas that one could come up with to take advantage of this," he said. 

Reprinted from Stanford Engineering Magazine, "How a new cooling system works without using any electricity" September 8, 2017.

Our phones and devices simply tell us where to go — and how long it will take to get there. But what are the risks? In the Future of Everything radio show, Professor Per Enge, Aeronautics and Astronautics, EE by Courtesy, discusses the accuracy of the system, how to keep the signals safe, and how systems will continue to improve.

In partnership with SiriusXM, Stanford University launched Stanford Radio, a new university-based pair of radio programs. The programs are produced in collaboration with the School of Engineering and the Graduate School of Education.

"The Future of Everything" is from the School of Engineering and "School's In" is from the Graduate School of Education.

In the Future of Everything radio show, Kwabena Boahen discusses the evolution of computers and how the next big step forward will be to design chips that behave more like the human brain.

Boahen is a professor of bioengineering and electrical engineering, exploring in his lab how these chips can interface with drones or with the human brain. "It's really early days," he says.

In partnership with SiriusXM, Stanford University launched Stanford Radio, a new university-based pair of radio programs. The programs are produced in collaboration with the School of Engineering and the Graduate School of Education.

"The Future of Everything" is from the School of Engineering and "School's In" is from the Graduate School of Education.

Kai Zang's (PhD '17) paper published in Nature Communications describes how nanotextured silicon can absorb more photons, furthering the effectiveness of solar cells. This research also resulted in a second discovery – improving the collision-avoidance technology in vehicles.

Professor Jim Harris said he always thought Zang's texturing technique was a good way to improve solar cells. "But the huge ramp up in autonomous vehicles and LIDAR suddenly made this 100 times more important," he says.

The researchers figured out how to create a very thin layer of silicon that could absorb as many photons as a much thicker layer of the costly material. Specifically, rather than laying the silicon flat, they nanotextured the surface of the silicon in a way that created more opportunities for light particles to be absorbed. Their technique increased photon absorption rates for the nanotextured solar cells compared to traditional thin silicon cells, making more cost-effective use of the material.

After the researchers shared these efficiency figures, engineers working on autonomous vehicles began asking whether this texturing technique could help them get more accurate results from a collision-avoidance technology called LIDAR, which is conceptually like sonar except that it uses light rather than sound waves to detect objects in the car's travel path.

In their Nature Communications paper, the team reports that their textured silicon can capture as many as three to six times more of the returning photons than today's LIDAR receivers. They believe this will enable self-driving car engineers to design high-performance, next-generation LIDAR systems that would continuously send out a single laser pulse in all directions. The reflected photons would be captured by an array of textured silicon detectors, creating moment-to-moment maps of pedestrian-filled city crosswalks.

Harris said the texturing technology could also help to solve two other LIDAR snags unique to self-driving cars – potential distortions caused by heat and the machine equivalent of peripheral vision. The Harris Group research website. 

Excerpted from "A new way to improve solar cells can also benefit self-driving cars," Stanford Engineering, October 2, 2017.

The Knight-Hennessy Scholars program will be lead by EE professor and Stanford's former president John Hennessy. The program is funded by philanthropist Philip Knight (MBA '62).

The program aims to prepare a new generation of leaders with the deep academic foundation and broad skill set needed to develop creative solutions for the world's most complex challenges.

Fifty scholars will join the first cohort that enrolls in fall 2018, with up to 100 scholars admitted annually in subsequent years. Scholars will comprise an interdisciplinary graduate community representing a wide range of backgrounds and nationalities.

Building on his or her core Stanford graduate degree program, each scholar will participate in opportunities for leadership training, mentorship and experiential learning across multiple disciplines. Knight-Hennessy Scholars will receive financial support for the full cost of attendance to pursue a graduate education at Stanford.

"We recognize that an application cannot fully reflect who Knight-Hennessy Scholars are and how they live," said Derrick Bolton, dean of Knight-Hennessy Scholars admission. "We believe it's essential that we learn not only about what they have done, but also who they are: their influences, ideals, hopes and dreams."

The program's faculty advisory board and global advisory board, respectively comprising faculty from all seven schools and leaders from business, government, health care, law, technology and other fields, shaped the criteria to guide the selection of scholars. The Knight-Hennessy Scholars admission committee will consider three primary criteria when evaluating applications: independence of thought, purposeful leadership and a civic mindset.

Up to 100 application finalists will be invited to attend Immersion Weekend, which will take place at Stanford in January 2018.

"Immersion Weekend will be an experience that is fun, informal and informative for applicants," Bolton said. "Our aim is that the candidates will learn more about the graduate programs, the Knight-Hennessy Scholars program and themselves. It also gives a chance for the departments and us to get to know the applicants better."

In addition to submitting the Knight-Hennessy Scholars application, applicants must also apply to the Stanford graduate program of their choice.

Additional information available Knight-Hennessy.stanford.edu

Excerpted from "Knight-Hennessy Scholars launches inaugural application," May 2017.

The paper, "Visualization of Second Order Tensor Fields and Matrix Data," was coauthored by professor Bert Hesselink and Thierry Delmarcelle in 1992. This paper describes some of their work on mathematical topology related to data analysis and lossless compression and visualization of tensor and vector data sets. The committee selected this paper for its importance and long term impact.

The IEEE VIS Test of Time Award is an accolade given to recognize articles published at previous conferences whose contents are still vibrant and useful today and have had a major impact and influence within and beyond the visualization community.

Papers are selected for each of the three conferences (VAST, InfoVis and SciVis) by Test of Time Awards panels appointed by the conference Steering Committees.

The decisions are based on objective measures such as the numbers of citations, and more subjective ones such as the quality and longevity and influence of ideas, outreach, uptake and effect not only in the research community, but also within application domains and visualization practice.

A full rationale will be provided for each paper at the conference opening, where we hope to encourage researchers to aim to produce work that is forward looking and has transformational potential. We're trying to build on our heritage to establish an ambitious future by making it clear at the outset of the conference opening that we want participants to aspire to be writing papers today that will be relevant in decades to come.

Professor Hesselink's research encompasses nano-photonics, ultra high density optical data storage, nonlinear optics, optical super-resolution, materials science, three-dimensional image processing and graphics, and Internet technologies.

Congratulations to Bert on this well-deserved recognition.

IEEE 2017 Test of Time Awards

Engineering Professor emeritus Thomas Kailath will be given the Marconi Society's Lifetime Achievement Award in recognition of his many transformative contributions to information and system science, as well as his sustained mentoring and development of new generations of scientists.

Kailath is the sixth scientist to be honored with a Marconi Society Lifetime Achievement Award. The society is dedicated to furthering scientific achievements in communications and the internet.

"The award is being conferred on Kailath for mentoring a generation of research scholars and writing a classic textbook in linear systems that changed the way the subject is taught and his special purpose architecture to implement the signal processing algorithms on VLSI (Very Large-scale System Integration) chips," the society said.

Kailath's research and teaching at Stanford have ranged over several fields of engineering and mathematics, with a different focus roughly every decade.

Please join us in congratulating Tom for this very special recognition. Tom will receive his award at the annual Marconi Society Awards dinner in October.

Excerpted from Stanford News, "Stanford electrical engineering Professor Thomas Kailath honored for lifetime achievement by Marconi Society," August 16, 2017.

The Marconi Society press release, "Legendary Stanford Professor Thomas Kailath Will Receive The Marconi Society Lifetime Achievement Award," August 14, 2017. 

Related News

Professor Emeritus Thomas Kailath Awarded Honorary Degree, April 2017

Tom Kailath selected as Eminent Member, IEEE-HKN, February 2017

Professor Kailath Receives National Medal of Science from President Obama, October 2014