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Stanford EE

Multiply Accumulate Engine - Manual Transmission

Summary
Professor Janakiraman Viraraghavan (IIT Madras)
AllenX 101 Auditorium
Feb
20
Date(s)
Content

Abstract: Compute In-Memory (CIM) is emerging as a popular architecture to overcome the Von- Neumann bottleneck for neural network inference which is computationally dominated by the multiply-accumulate (MAC) operation. Artificial intelligence workloads demand a wide range of MAC precision. Pitch-matching constraints in compute-in-memory engines limit the analog-to- digital converter (ADC) precision to about 8 bits. This talk presents the theory and implementation details for mapping a suitable input-conditioned MAC range to the input dynamic range of the on-chip 7-b ADC, thereby achieving up to 10 bits of output MAC precision. A 424Kb SRAM CIM macro was fabricated in TSMC 28nm, which computes 72 MACs in parallel per cycle. Measurement results at nominal supply voltage show an energy efficiency of 196.6–102 TOPS/W/b for a 2–10 bit output MAC precision. Inference results on MNIST, CIFAR10, and CIFAR100 are shown with ≤ 1% accuracy loss from the software baseline. The proposed subtract-amplify input conditioned quantization scheme presents an interesting architecture for the current domain CIM that allows energy-efficient operation akin to the gear system in automobiles.

Bio: Janakiraman Viraraghavan is an Assistant Professor in the Integrated Circuits and Systems group of the Department of Electrical Engineering at IIT Madras since 2016. He received his Ph.D. in Microelectronics, in 2011, from the Department of Electrical and Communication at the Indian Institute of Science, Bangalore. Janakiraman was with the Semiconductor Research and Development Center at IBM India Pvt. Ltd. since 2011 before moving to GLOBALFOUNDRIES, India in 2015 where he worked on early technology development of Embedded DRAM and Non-Volatile Memory design, respectively. He graduated with a B.E degree from the Electronics and Communication Engineering Department of Rashtreeya Vidyalaya College of Engineering in 2003. His research interests include hardware implementation of artificial intelligence algorithms and statistical analysis in VLSI. Janakiraman received the Young Faculty Recognition Award from IIT Madras in 2019 and the Faculty Partnership Award from IBM in 2024. Janakiraman has been serving as an associate editor for the Open Journal of Circuits and Systems since 2020.