Abstract: In this talk the different concepts of ferroelectric memories and the fundamentals of ferroelectricity are briefly introduced, especially with focus of ferroelectric HfO2. The center of controlling these devices lies within the deciphering and targeted engineering of the phase diagram and resulting band-diagram. These aspects will be discussed at the example of FEoL based ferroelectric FET (FeFET). This novel device, embedded in GlobalFoundries 28nm HKMG CMOS technology platform, reveals itself to be much more than just a crude, stiff and ideal memory cell. We will deep dive into aspects of its characterization, giving insights into its band-diagram and connected challenges, as well as some interesting features and potential applications. Elements like data retention engineering, variability control, the balance between charge trapping and ferroelectric switching and endurance will be discussed. To really make use of this novel element in the device suite of modern CMOS platforms, you need to understand all these aspects, hence the chip design community can open up new horizons, f.i. in the field of neuromorphic computing.

Bio: Sven Beyer received his master’s and Ph.D. in Physics from the University of Hamburg, Germany. He started his career with Infineon as a manufacturing engineer in the etch department in 2003. He joined the integration department of AMD in 2005. He spent a year in the ASTA alliance 2007 working on the 45nm node and has worked in many roles since then, ranging from integration technology-lead to customer engineering and lasting throughout the separation of GLOBALFOUNDRIES and AMD. Today he serves as DMTS in GLOBALFOUNDRIES FAB1 as technology architect, overseeing mainly the eNVM roadmap and development in Dresden.