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Stanford EE

High-performance Low-cost AMS Circuit and Beyond: Time-domain Architecture and ML-based Design Automation

Summary
Juzheng Liu (University of Southern California)
Packard 101
Mar
18
Date(s)
Content

Abstract: We are living in an era where electronic products have become ubiquitous. For better user experiences, massive amounts of data need to be generated, processed, and transmitted. To support the high data rate, high-performance Analog Mixed Signal (AMS) circuits play a crucial role in advanced electronic systems, serving as the bridge between the analog and digital domains. However, achieving further performance improvements in AMS circuits using conventional architectures and design approaches has become increasingly challenging. Factors such as excessive power consumption, fabrication costs, and design expenses contribute to this difficulty. To address these issues, this presentation will focus on two key aspects: circuit architecture and design methodology innovations. Firstly, we will explore an emerging time-domain data converter architecture optimized for high-speed, high-efficiency operation. Leveraging several circuit-level innovations, we have successfully implemented two time-domain analog-to-digital converter (ADC) prototypes using cutting-edge 14nm and 4nm FinFet technologies, achieving record-breaking speed and efficiency. Secondly, we will delve into a comprehensive AMS circuit design automation flow that significantly reduces design costs. This flow covers the entire design process from specifications to silicon prototypes and can successfully generate target designs with minimum human intervention. Based on these existing efforts, I will conclude this talk with my vision and plans for future AMS circuit development, with the goal of creating affordable and accessible high-performance solutions across diverse applications.

Bio: Juzheng Liu (he/him) received his B.S. in Physics from Tsinghua University, Beijing, China, in 2019, and his Ph.D. in Electrical Engineering from the University of Southern California, Los Angeles, CA, in 2023. Now he is a postdoc at USC. He was a Ph.D. intern in MediaTek from 2022 Q1 to 2023 Q3. His research interests include high-speed data converter design, machine-learning-based circuit design automation, and in-memory computing. Juzheng Liu was the recipient (first author) of the ISSCC 2022 Jack Kilby Award for Outstanding Student Paper. He is a USC Ming Hsieh Institute Scholar from 2023 to 2024. He also received the 2023-2024 IEEE Solid-State Circuits Society (SSCS) Predoctoral Achievement Award. Juzheng has served as the technical reviewer of the IEEE Journal of Solid-State Circuits, IEEE Solid-State Circuits Letters, and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.