2017

November 2017

Emeritus professor Tom Kailath has been elected a Fellow of the American Mathematical Society (AMS). The citation reads, "For contributions to information theory and related areas, and for applications."

The Fellows of the AMS designation recognizes members who have made outstanding contributions to the creation, exposition, advancement, communication, and utilization of mathematics. Among the goals of the program are to create an enlarged class of mathematicians recognized by their peers as distinguished because of their contributions to the profession, and to honor excellence.

On the 2018 Class of Fellows of the AMS, Professor Kenneth A. Ribet, President of the American Mathematical Society, states, "This year's class of AMS Fellows has been selected from a large and deep pool of superb candidates. It is my pleasure and honor as AMS President to congratulate the new Fellows for their diverse contributions to the mathematical sciences and to the mathematics profession."

 

Please join us in congratulating Tom for this most recent recognition of his groundbreaking contributions!

 

Read more at the American Mathematical Fellows

October 2017

A dozen teams of EE students came together Friday afternoon to compete in EE's Annual Pumpkin Carving Contest.

This year's event was hosted in the Packard Atrium, with plenty of candy, refreshments, and music. View photo album.

Judges included student services staff Rachel Pham, graduate student Jerry Shi, and Professor Juan Rivas-Davila. Judging criteria included completeness, technical skill, creativity, and costumes.

In addition to judge's scores, a number of voting ballots were also available for attendees to vote for their favorite pumpkin. They were added to judges totals and counted toward the final result.

Third Place went to the "Eevee Evolution" of David Zeng, Tracey Hong, and Neal Jean.
Second place went to "EE42" Team, whose members are Katherine Kowalski, Amit Kohli, Justin Babauta, and Alec Preciado.
The First place team was "Pumpkin Carving Dream Team" of Nicole Grimwood, Nicolo Maganzini, Tori Fujinami, and Tong Mu.

 

Thanks to all of our staff, faculty, and students for your enthusiastic participation!

October 2017

Ruishan Liu (PhD candidate) has received the Best Poster Award at the Bay Area Machine Learning Symposium, October 19, 2017. Ruishan belongs to the Stanford Laboratory for Machine Learning group, advised by Professor James Zou. Ruishan develops algorithms and theories in machine learning and reinforcement learning. She is also interested in applications in genomics and healthcare.

 

Poster Title:
"The Effects of Memory Replay in Reinforcement Learning"

Poster Abstract:
Experience replay is a key technique behind many recent advances in deep reinforcement learning. Despite its wide-spread application, very little is understood about the properties of experience replay. How does the amount of memory kept affect learning dynamics? Does it help to prioritize certain experiences?

In our work, we address these questions by formulating a dynamical systems ODE model of Q-learning with experience replay. We derive analytic solutions of the ODE for a simple setting. We show that even in this very simple setting, the amount of memory kept can substantially affect the agent's performance. Too much or too little memory both slow down learning.

We also proposed a simple algorithm for adaptively changing the memory buffer size which achieves consistently good empirical performance.

 

Congratulations to Ruishan!

October 2017

 Professor Andrea Goldsmith has been selected as the recipient of the 2017 WICE Mentorship Award from the IEEE Communications Society. She will be presented with a plaque at the IEEE Globecom'17 in Singapore.

The WICE Mentorship Award recognizes members of IEEE ComSoc who have made a strong commitment to mentoring WICE members, have had a significant positive impact on their mentees' education and career, and who, through their mentees, have advanced communications engineering.

The IEEE (Institute of Electrical and Electronics Engineers, Inc.) is the world's largest technical professional society. Through its more than 400,000 members in 150 countries, the organization is a leading authority on a wide variety of areas ranging from aerospace systems, computers and telecommunications to biomedical engineering, electric power and consumer electronics. Dedicated to the advancement of technology, the IEEE publishes 30 percent of the world's literature in the electrical and electronics engineering and computer science fields, and has developed nearly 900 active industry standards. The organization annually sponsors more than 850 conferences worldwide.

The IEEE Communications Society (IEEE ComSoc) is a leading global community comprised of a diverse set of professionals with a common interest in advancing all communications and networking technologies.

 

Congratulations to Andrea on this well-deserved recognition!

 

 

July 2017

Kirby Smithe (PhD candidate) recieved first place for his presentation, "High-field transport and velocity saturation in CVD monolayer MoS2" at the EDISON 20 Conference in July.

All student preesenters were ranked by a committee comprised of members of the International Advisory Committee. More than 25 presentations and posters were evaluated by this committee. Kirby's award is accompanied by $300 and a glass commemorative trophy.

 

Kirby's research involves growth and material characterization of 2D semiconductors and engineering 2D electronic devices for circuit-level applications. He is the recipient of the Stanford Graduate Fellowship as well as the NSF Graduate Fellowship. Kirby is part of the Pop Lab research group, advised by Professor Eric Pop.

 

Congratulations to Kirby!

 

 

July 2017

PhD candidates Alex Gabourie and Saurabh Suryavanshi received Best Paper Award at the 17th IEEE International Conference on Nanotechnology (IEEE NANO 2017). Their paper is titled, "Thermal Boundary Conductance of the MoS2-SiO2 Interface."

The awards candidates were nominated by program committee together with award committee based on the rating of the abstract. The awards winners were selected from the candidates by the award committee based on both the recommendation of excellent final papers by track chairs and the rating of the overall quality of the final paper and the presentation by session chairs and invited speakers.

Saurabh and Alex are part of the Pop Lab.

Congratulations Alex & Saurabh! 

 

 

The paper's authors are Saurabh Vinayak Suryavanshi, Alexander Joseph Gabourie, Amir Barati Farimani, Eilam Yalon and Eric Pop.

 2017.ieeenano.org

October 2017

Congratulations to PhD candidates Connor McClellan and Fiona Ching-Hua Wang. Each received the best in session award at the TechCon 2017, held in Austin, Texas. 

  • Connor's paper, "Effective n-type Doping of Monolayer MoS2 by AlO(x)" was presented in the 2-D and TMD Materials and Devices: I session. Professor Eric Pop is Connor's advisor

  • Fiona's paper, "N-type Black Phosphorus Transistor with Low Work Function Contacts," was presented in the 2-D and TMD Materials and Devices: III session. Professor H.-S. Philip Wong is Fiona's advisor.

They were presented with a certificate and medal during the final event for SRC TECHCON 2017.

 

 

September 2017

Daily headlines emphasize the down side of technology: cyberattacks, election hacking and the threat of fake news. In response, government organizations are scrambling to understand how policy should shape technology's role in governance, security and jobs.

The Stanford Cyber Initiative is at the forefront of answering this question. Co-directors Michael McFaul, a professor of political science and director of the Freeman Spogli Institute for International Studies (FSI), and Dan Boneh, a professor of computer science and electrical engineering, tell us how the research behind the initiative helps define the role of policy in a world increasingly influenced by technology.

 

What is the goal of the Stanford Cyber Initiative?

McFaul: It is part of a broader cyber initiative that the Hewlett Foundation started several years ago. New technologies are changing the way we view security, the way we govern, the way we work. They're part of every aspect of life, and yet how we manage them, how we think about policy to regulate and enhance their use, has not caught up to the technology. Here at Stanford, we're focusing on the right policies and policy frameworks to address the new technological era we live in today.

Boneh: When we came to define cybersecurity, it turned out to include many different areas. It has to do with the security of computing technology, but it also includes implications to the workforce and U.S. economy. It includes security of our democracy and election systems. It includes security of our financial systems. The Cyber Initiative funds Stanford research in these areas that focuses on policy.

What's changing now that the Cyber Initiative has moved to the Freeman Spogli Institute for International Studies?

Boneh: I think it's wonderful the Cyber Initiative now has a home. With FSI, we have much more infrastructure support. It is also wonderful to have Mike's vision and leadership for the initiative. Mike has been a fantastic collaborator to work with on this.

McFaul: As the co-director with Dan, we've shaped it in a couple of different directions. We want to build on some strengths, and that means fewer areas that we focus on and greater resources to them. The three that I think are most prominent in our thinking are cybersecurity, governance and the future of work.

How does the Cyber Initiative address policy concerns?

McFaul: We require that all projects have an applied or policy component. We're trying to bridge the gap between the east side of campus and the west side. We want to see more computer scientists interacting with social scientists, lawyers and even philosophers, as there are many ethical and moral issues that need to be addressed.

For example, Amy Zegart and her team at the Center for International Security and Cooperation and the Hoover Institution hosted the Cyber Boot Camp. They assembled congressional staffers who deal with cybersecurity issues as well as other experts to discuss the most pressing challenges in cyberspace. What could be a more direct impact than educating them about these topics? In the realm of disinformation, a consortium of researchers affiliated with the Center on Democracy, Development and the Rule of Law are investigating the role that foreign governments played in our election, exploring what regulations should look like and the difference between First Amendment rights and foreign interference.

Then, there is wide disagreement about whether artificial intelligence is going to make us all better off or whether it's going to make us all unemployed. Scholars supported by the initiative are trying to address this. Understanding the relationship between new technologies and the workforce will eventually help federal, state and local government officials, as well as companies, schools and trade unions, to develop appropriate policies.

Boneh: On the technical side, many new technologies that can be beneficial to end users are not adopted because they do not match companies' incentives. Good tech policy can incentivize companies to adopt those beneficial technologies that improve privacy and security for clients or consumers. We want policies that promote computer security, but at the same time, we do not want to stifle innovation or greatly increase operating costs. At Stanford, we are in a unique position to make progress on these issues. We have a strong collaboration with the tech industry and the ears of policymakers in D.C.

Why is it important to work across disciplines when addressing cyber concerns?

Boneh: It brings together researchers who normally do not interact much. Every project that we fund crosses school boundaries. It brings faculty in the humanities to work with faculty in engineering, and that is not something that happens very often. You cannot do policy without understanding technology and effective technology needs to understand the policy implications. I recently taught a class with colleagues at the law school on cyber policy and the law. This is not something I would have done had it not been for the Cyber Initiative.

McFaul: Virtually every field is being impacted by new technologies, but expertise in cyber policy is not easily defined. I can tell you which are the five top journals in my field of political science – and if you want to advance your career, you publish there. I'm not sure I could name them in cyber policy. It feels to me like the technology is ahead of the policy, and a lot of the traditional security experts are not well-versed in computer science and engineering, including me. Conversely, those most expert in cyber technologies have paid little attention to national security, democracy or the future of capitalism. By bringing these researchers together, we increase understanding of technology's role across fields. 

How is the Cyber Initiative educating Stanford students?

McFaul: There is growing demand for courses that cross disciplines to address the rapidly evolving landscape of cybersecurity. We are training the next generation of leaders who will shape this field. Some of our new classes focus on cybersecurity and the law, fake news, privacy policies, how algorithms affect human perception, Facebook's foreign policy, and how technology affects elections. What's striking to me is that we're still in the early stages of incorporating cyber components into courses, curriculum and degrees.

Here at FSI, we have a master's degree in international policy studies, which will soon launch a new specialization in cyber policy. It will be one of the first in the country. But what is the content of such a program? It turns out that's a pretty contentious issue and we're wrestling with it right now.


The Stanford Cyber Initiative plans to fund research on cyber policy. Interested researchers should contact Allison Berke at aberke@stanford.edu.

Original article appeared in the Stanford News, September 26, 2017.

Image credit: L.A. Cicero
September 2017

John L. Hennessy, inaugural director of the Knight-Hennessy Scholars Program and president emeritus of Stanford, has been elected an international fellow of the Royal Academy of Engineering, the national academy for engineering in the United Kingdom.

Founded in 1976, the Royal Academy of Engineering brings together the most successful and talented engineers for a shared purpose: to advance and promote excellence in engineering. Earlier this week, the academy announced 50 new fellows, two international fellows, including Hennessy, and one honorary fellow.

Hennessy, a pioneer in computer architecture, said the honor held special significance because so many early pioneers in the field did their great work in England, from Alan Turing (1912-1954), a mathematician who conceived of modern computing and played a crucial role in the Allied victory over Nazi Germany in WWII, to Maurice Wilkes (1913-2010), a professor at Cambridge University who is considered the most important figure in the development of practical computing in the United Kingdom.

"I have had the pleasure of knowing many colleagues who are members of the Royal Academy of Engineering, including Wilkes, a colleague from Cambridge who I knew personally for many years," Hennessy said. "It is an honor to join such an august group."

Hennessy has won numerous awards for his work, including election to the National Academy of Engineering and the National Academy of Sciences. He is also a fellow of the American Academy of Arts and Sciences, the Association for Computing Machinery, and the Institute of Electrical and Electronics Engineers.

After stepping down as president of Stanford a year ago, Hennessy became the Shriram Family Director of the Knight-Hennessy Scholars Program, which is the largest fully endowed graduate-level scholarship program in the world. The program, which is currently located in the Littlefield Center, held a groundbreaking ceremony last spring for its future home, Denning House. Currently, the program is accepting applications for its first class of 50 scholars, who will begin their studies in the fall of 2018.

Hennessy joined Stanford's faculty in 1977 as an assistant professor of electrical engineering. In 1981, he drew together researchers to focus on a technology known as RISC (reduced instruction set computer), which revolutionized computing by increasing performance while reducing costs. Hennessy helped transfer this technology to industry. In 1984, he cofounded MIPS Computer Systems, now MIPS Technologies, which designs microprocessors.

Hennessy, who rose through the academic ranks at Stanford and became a full professor in 1986, served as chair of the Department of Computer Science and took the helm as dean of the School of Engineering in 1996. He became provost in 1999 and was inaugurated as Stanford's 10th president in 2000. He stepped down from the presidency in 2016.

As president, Hennessy fostered interdisciplinary collaboration, launching university-wide initiatives in human health, environmental sustainability, international affairs, the arts and creativity, and greatly expanding opportunities for multidisciplinary teaching and learning. Under his leadership, the campus underwent a physical transformation to support 21st-century research and teaching needs, including cutting-edge facilities for the Graduate School of Business, the Law School, the Science and Engineering Quadrangle, Stanford Medicine and the Arts District.


 

 

Reprinted from Stanford News, "John L. Hennessy elected to Royal Academy of Engineering," September 7, 2017.

July 2017

One day soon we may live in smart houses that cater to our habits and needs, or ride in autonomous cars that rely on embedded sensors to provide safety and convenience. But today's electronic devices may not be able handle the deluge of data such applications portend because of limitations in their materials and design, according to the authors of a Stanford-led experiment recently published in Nature.

To begin with, silicon transistors are no longer improving at their historic rate, which threatens to end the promise of smaller, faster computing known as Moore's Law. A second and related reason is computer design, say senior authors and Stanford EE professors Subhasish Mitra and H.-S. Philip Wong. Today's computers rely on separate logic and memory chips. These are laid out in two dimensions, like houses in a suburb, and connected by tiny wires, or interconnects, that become bottlenecked with data traffic.

Now, the Stanford team has created a chip that breaks this bottleneck in two ways: first, by using nanomaterials not based on silicon for both logic and memory, and second, by stacking these computation and storage layers vertically, like floors in a high-rise, with a plethora of elevator-like interconnects between the "floors" to eliminate delays. "This is the largest and most complex nanoelectronic system that has so far been made using the materials and nanotechnologies that are emerging to leapfrog silicon," said Mitra.

The team, whose other Stanford members include EE professors Roger Howe and Krishna Saraswat, integrated over 2 million non-silicon transistors and 1 million memory cells, in addition to on-chip sensors for detecting gases – a proof of principle for other tasks yet to be devised. "Electronic devices of these materials and three-dimensional design could ultimately give us computational systems 1,000 times more energy-efficient than anything we can build of silicon," Wong said.

First author Max Shulaker (PhD '16), who performed this work while a PhD candidate, is now an assistant professor at MIT and core member of its Microsystems Technology Laboratories. He explained in a single word why the team had to use emerging nanotechnologies and not conventional silicon technologies to achieve the high-rise design: heat. "Building silicon transistors involves temperatures of over 1,000 degrees Celsius," Shulaker said. "If you try to build a second layer on top of the first, you'll damage the bottom layer. This is why chips today have a single layer of circuitry."

The magic of the materials

The new prototype chip is a radical change from today's chips because it uses multiple nanotechnologies that can be fabricated at relatively low heat, Shulaker explained. Instead of relying on silicon-based transistors, the new chip uses carbon nanotubes, or CNTs, to perform computations. CNTs are sheets of 2-D carbon formed into nanocylinders. The new Naturepaper incorporates prior ground-breaking work by this team in developing the world's first all-CNT computer.

The memory component of the new chip also relied on new processes and materials improved upon by this team. Called resistive random-access memory (RRAM), this is a type of nonvolatile memory — meaning that it doesn't lose data when the power is turned off – that operates by changing the resistance of a solid dielectric material.

The key in this work is that CNT circuits and RRAM memory can be fabricated at temperatures below 200 Celsius. "This means they can be built up in layers without harming the circuits beneath," Shulaker says. "This truly is a remarkable feat of engineering," says Barbara De Salvo, scientific director at CEA-LETI, France, an international expert not connected with this project.

The RRAM and carbon nanotubes are built vertically over one another, making a new, dense 3-D computer architecture with interleaving layers of logic and memory. By inserting a plethora of wires between these layers, this 3-D architecture promises to address the communication bottleneck. "In addition to improved devices, 3-D integration can address another key consideration in systems: the interconnects within and between chips," Saraswat said.

To demonstrate the potential of the technology, the researchers placed over a million carbon nanotube-based sensors on the surface of the chip, which they used to detect and classify ambient gases.

Due to the layering of sensing, data storage and computing, the chip was able to measure each of the sensors in parallel and then write directly into its memory, generating huge bandwidth without risk of hitting a bottleneck, because the 3-D design made it unnecessary to move data between chips. In fact, even though Shulaker built the chip using the limited capabilities of an academic fabrication facility, the peak bandwidth between vertical layers of the chip could potentially approach and exceed the peak memory bandwidth of the most sophisticated silicon-based technologies available today.

System benefits

This provides several simultaneous benefits for future computing systems.

"As a result, the chip is able to store massive amounts of data and perform on-chip processing to transform a data deluge into useful information," Mitra says.

Energy efficiency is another benefit. "Logic made from carbon nanotubes will be ten times more energy efficient as today's logic made from silicon," Wong said. "RRAM can also be denser, faster and more energy-efficient than the memory we use today."

Thanks to the ground-breaking approach embodied by the Nature paper, the work is getting attention from leading scientists who are not directly connected with the research. Jan Rabaey, a professor of electrical engineering and computer sciences at the University of California, Berkeley, said 3-D chip architecture is such a fundamentally different approach that it may have other, more futuristic benefits to the advance of computing. "These [3-D] structures may be particularly suited for alternative learning-based computational paradigms such as brain-inspired systems and deep neural nets," Rabaey said, adding, "The approach presented by the authors is definitely a great first step in that direction."

 

This work was funded by the Defense Advanced Research Projects Agency, National Science Foundation, Semiconductor Research Corporation, STARnet SONIC and member companies of the Stanford SystemX Alliance.


 

This story is a revised version of a press release by MIT News correspondent Helen Knight.

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