SystemX

SystemX Seminar

Topic: 
FD-SOI Technology, Advantages for Analog/RF and Mixed-Signal Designs
Abstract / Description: 

Fully Depleted Silicon on Insulator (FD-SOI) is one of the alternatives that permits today to follow the Moore's law of CMOS integration for the 28nm node and beyond, while still dealing with fully planar transistors. Numerous presentations have presented over the several last years the benefits of this technology for an energy efficient integration of digital signal processing cores. This talk will focus on the benefits of FD-SOI technology for analog/RF/millimeter-wave and high-speed mixed signal circuits, by taking full advantage of wide voltage range body biasing tuning. For each category of circuits (analog/RF, mmW and high-speed), concrete design examples are given in order to highlight the main design features specific to FD-SOI.

Date and Time: 
Thursday, October 13, 2016 - 4:30pm to 5:30pm
Venue: 
Allen 101X

SystemX Seminar

Topic: 
The LIGO detection of real time gravitational wave signals: a personal perspective on the achievement and key technology
Abstract / Description: 

The triumph of LIGO’s confirmation, at this 100th anniversary of Einstein’s prophetic work, both of gravitational wave propagation and their full GR source dynamics is astounding enough to recount. An exciting new field has been launched, and grown in either its experimental or astrophysical scope beyond the compass of one talk. Only briefly, I will first present an overview of the LIGO instruments with insight into their roots in the classic “interferometer of Michelson” (findings so inspirational to Einstein) over 130 years and > 1010 in metric resolution ago. Next, the amazing nature of the binary black hole coalescence events detected will be spotlighted. Rather than due to particular conspicuous technical innovations, I emphasize that human scientific vision sustained this quest from the time of Weber and realization that BHs and GWs should be palpable. Certainly the culmination in LIGO’s discovery 60 years later is essentially due to the perseverance and faith of remarkable visionaries carrying on through much adversity and periods of doubt. Turning from the drama, I’ll take a personal, insider view of a selection of fascinating technical challenges faced in LIGO. The message will be that focused, meticulous engineering carried out by dedicated and ingenious scientists will carry the day. Seemingly unglamorous details such as thorough understanding of materials thermal and mechanical characteristics; vacuum technology; and ultra-low noise servo-mechanical strategies take center stage!

Date and Time: 
Thursday, October 6, 2016 - 4:30pm to 5:30pm
Venue: 
Allen 101X

SystemX Seminar

Topic: 
Computing: Its History, Foundations, and Lead in to the SystemX Seminar Series
Abstract / Description: 

From Colossus and Eniac to the present world of iPhone and Nest, machine computation has reached from military use, to scientific pursuits, to commercial applications, to office automation, to home use/entertainment, all the way to a continued presence in our daily lives.   This evolution has been propelled by technology advances in semiconductors, but also by advances in mechanical assembly, in communications methods, in sensing capabilities, as well as development practices and the supporting business models.    This talk will trace the arc of these developments, and do so in the spirit of introducing the focus areas of SystemX.  The conclusion of the talk, with its summary of challenges ahead, shapes the organization of the seminar series to follow.

Date and Time: 
Thursday, September 29, 2016 - 4:30pm to 5:30pm
Venue: 
Allen 101X

SystemX Seminar

Topic: 
Disruptions in Semiconductor Technology for the Cognitive Era
Abstract / Description: 

Dr Khare is pleased to offer his perspective on what lies ahead for the semiconductor devices and systems roadmap, from scaling and advanced pattering, to novel logic devices, toward new computing devices and architectures for cognitive systems.

Date and Time: 
Friday, September 30, 2016 - 3:00pm to 4:00pm
Venue: 
Allen 101X

SystemX Seminar

Topic: 
Holistic Design In High-Speed Optical Interconnects
Abstract / Description: 

In this talk a 3D-integrated CMOS/Silicon-photonic receiver will be presented. This receiver is designed to effectively take advantage of low-cap silicon photonic photodiodes and advanced 3D-integration technologies. The electronic chip features an integrating receiver based on a low-bandwidth TIA that employs double-sampling and equalization through dynamic offset modulation. This architecture is also implemented in a 4-channel WDM-based parallel optical receiver using a forwarded clock at quarter-rate. Quadrature ILO-based clocking is employed for synchronization and a novel frequency-tracking method that exploits the dynamics of IL in a quadrature ring oscillator to increase the effective locking range.

When electronics and photonics are closely integrated they provide a great promise for improving interconnect performance and reduce cost. Holistic design of co-integrated optical interconnects provides a unique opportunity to design entirely new architectures and bring the performance of current systems to unprecedented levels. In this light, I will cover some future directions for my research beyond data communication such as sensors, computing and networking applications.

Date and Time: 
Wednesday, June 22, 2016 - 3:00pm
Venue: 
AllenX Auditorium

SystemX Seminar

Topic: 
DC-DC Regulators using MEMS Relay
Abstract / Description: 

A problem not often considered with mobile device chargers and other appliances that use electrical outlets is reducing the quiescent power loss due to solid-state device leakage when the appliance is not in use. Could micro-electromechanical (MEM) relays be used to aid in eliminating this vampire power because of their extremely high off-resistance? Initial work on the use of a single four-terminal MEM relay in conventional buck and boost converters will be presented. This talk will include an overview of electrostatically actuated MEM relay operation, characterization, including typical challenges encountered during probe station testing, and failure mechanisms. In addition, analytical solutions that account for non-idealities, simulated, and measured results will be presented for buck and boost DC-DC converters in both discontinuous conduction mode (DCM) and continuous condition mode (CCM).

Date and Time: 
Thursday, June 2, 2016 - 4:30pm to 5:30pm
Venue: 
AllenX Auditorium

SystemX Seminar

Topic: 
5G Architectures and Circuits – A Path to 10 Gb/s and 100 Radios
Abstract / Description: 

Receiver architectures and circuits for the 5G technologies will be reviewed in this presentation. Two possible architectural directions towards 5G are considered.

From the SNR point of view, we can think of the sensitivity radio (or the long-distance radio) as the one extreme, and the maximum throughput radio (or the short-distance radio) as another extreme.

From the technology point of view, we can think of the co-working cellular radio (or the 3G/4G/4G+ radio) as the one extreme, and the co-working connectivity-cellular radio (4G+/WLAN radio) as the another extreme.

All these cellular and connectivity technologies 'speak' different standardization languages, but from the RF IC design point of view there are many similarities that could be used to build a universal radio working across all the SNRs, distances, throughputs, and technologies from the very same circuits. In this presentation, the receiver architectures and circuits meeting this common goal of 'all-in-1' radio will be put up for a consideration.

An 'imaginary' local very-high throughput personal network (radio-belt) is introduced as a vehicle to build a 5G system with a 10Gb/s data rate. Design trade-offs among different modulation schemes, bandwidths, bands, and MIMO and beamforming signal-processing techniques are discussed throughout the presentation and their impact on the 5G circuit and architecture design outlined.

Date and Time: 
Thursday, May 26, 2016 - 4:30pm to 5:30pm
Venue: 
Packard 202

SystemX Seminar

Topic: 
Energy-Efficient Hardware for Embedded Vision and Deep Convolutional Neural Networks
Abstract / Description: 

Visual object detection and recognition are needed for a wide range of applications including robotics/drones, self-driving cars, smart Internet of Things, and portable/wearable electronics. For many of these applications, local embedded processing is preferred due to privacy or latency concerns. In this talk, we will describe how joint algorithm and hardware design can be used to reduce the energy consumption of object detection and recognition while delivering real-time and robust performance. We will discuss several energy-efficient techniques that exploit sparsity, reduce data movement and storage costs, and show how they can be applied to popular forms of object detection and recognition, including those that use deep convolutional neural nets (CNNs). We will present results from recently fabricated ASICs (including our deep CNN accelerator named "Eyeriss") that demonstrate these techniques in real-time computer vision systems.

Date and Time: 
Monday, May 23, 2016 - 4:30pm
Venue: 
Packard 202

SystemX Seminar

Topic: 
Innovation and Entrepreneurship Opportunities in the IC world
Abstract / Description: 

Phenomenal growth in the use of mobile wireless, and ubiquitous sensor products has fueled a resurgence of excitement in the semiconductor industry. In spite of increasing investment costs and predictions of doom and gloom, these are exciting times in the semiconductor innovation pipeline for those that are willing to adapt and make adjustments.

This seminar will offer a discussion of the important technical and business challenges, and the myriad of opportunities. The focus will be on Innovation and Entrepreneurship opportunities. Leveraging the industry's use of collaborative research and development, and the Fabless Integrated Circuits model provides many opportunities for new ideas. Because the success rate of start-up companies remains relatively low, innovators need to pay attention to a broad spectrum of factors besides their technical idea. This seminar will provide guidelines for innovators to launch companies with increased probabilities of success. Using the Fabless IC startup learnings as a base, this course will offer hope for entrepreneurs, researchers, and designers in fulfilling their dreams.

Date and Time: 
Thursday, May 19, 2016 - 4:30pm to 5:30pm
Venue: 
Packard 202

SystemX Seminar

Topic: 
Integrated Neural Interfaces
Abstract / Description: 

Large-scale recording of neural signals is essential for gaining a better understanding of the elaborate, dynamic picture of the brain that emerges from interactions involving individual cells and complex neural circuits. Over the past few decades neural recording capabilities have progressed from single unit in vitro recordings to massively multichannel monitoring in vivo. Currently, microwire and microfabricated silicon neural probes are capable of sensing the simultaneous activity of hundreds of neurons. Miniaturized recording systems based on custom CMOS integrated circuits have been developed that can record from around 16-100 channels simultaneously, and these are no bigger than a postage stamp. Another wave of innovation is needed to enable next-generation neural interfaces that will provide high resolution access to 1,000-10,000 neurons and beyond.

Beyond understanding the brain, another "killer app" for neural interfaces is to directly connect prosthetic devices to a patient's nervous system. For example, cochlear implants today provide a sense of sound to over 100,000 patients in the US alone, including congenitally deaf children who now participate in music classes. Retinal prosthetics that provide artificial sight are currently being translated into medical products, with ongoing clinical trials inside and outside the US. Next on the horizon are motor prosthetics that allow paralyzed individuals to interact with the physical and cyber worlds. Bidirectional (read/write) motor prosthetics are being created at University of Utah that provide high degree of freedom control of mechanical prostheses while simultaneously invoking hundreds of different percepts generated by sensors and communicated to the patient through stimulation electrodes. Systems like these are comprised of many hardware and software components stretched to performance limits, offering a wealth opportunity for EE researchers.

Date and Time: 
Thursday, May 12, 2016 - 4:30pm
Venue: 
AllenX Auditorium

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