SystemX

SystemX Seminar: Nanoscale MOSFET Modeling for the Design of Low-power Analog and RF Circuits

Topic: 
Nanoscale MOSFET Modeling for the Design of Low-power Analog and RF Circuits
Abstract / Description: 

The emergence of the Internet of Things (IoT) poses stringent requirements on the energy consumption and has hence become the primary driver for low-power analog and RF circuit design. Implementation of increasingly complex functions under highly constrained power and area budgets, while circumventing the challenges posed by modern device technologies, makes analog and RF circuit design ever more challenging. Some guidance would therefore be invaluable for the designer to navigate the multi-variable design space.

This talk presents low-power analog and RF design techniques that can be applied from device to circuit level. It starts with the presentation of the concept of inversion coefficient IC as an essential design parameter that spans the entire range of operating points from weak via moderate to strong inversion. Several figures-of-merit (FoM) including the Gm/ID, the Ft and their product Gm ‧ Ft/ID, capturing the various trade-offs encountered in analog and RF circuit design are presented. The simplicity of the IC-based models is emphasized and compared against measurements of 40- and 28-nm bulk CMOS processes and BSIM6 simulations. Finally, a simple technique to extract the basic model parameters from measurements or simulation is described before concluding.

Date and Time: 
Thursday, February 15, 2018 - 4:30pm
Venue: 
Y2E2 111

SystemX Seminar: Advanced SAR ADCs – Efficiency, Accuracy, Calibration and References

Topic: 
Advanced SAR ADCs – Efficiency, Accuracy, Calibration and References
Abstract / Description: 

This talk will discuss several recent techniques that were developed in the context of SAR ADCs. The presentation will show a few design examples with different performance targets. The first topic deals with minimizing power consumption while aiming to increase accuracy by means of linearization and noise reduction techniques. The second topic is about efficient calibration techniques for SAR ADCs. The last part describes a method to co-integrate the reference buffer with the SAR ADC.

Date and Time: 
Friday, February 9, 2018 - 4:00pm
Venue: 
Allen 101X

SystemX Seminar: Mobile technology trends in 5G and beyond

Topic: 
Mobile technology trends in 5G and beyond
Abstract / Description: 

The technology development and standardization of 5G radio access have been rapidly progressing. A major agreement was reached in the past few weeks, enabling industry to complete its product development, with early commercial network deployments expected in 2018. In addition to enhancing mobile broadband services, which have dominated 4G, 5G aims to enable critical machine type communications (cMTC) and support Internet of Things (IoT) using the same network. This ambition poses stringent design requirements and performance objectives in many different dimensions. For example, in addition to significant improvements in peak data rates and network capacity compared to existing cellular technologies, 5G performance objectives further include ultra-low latency and ultra-reliability for cMTC, and superior device energy efficiency, low device cost, ubiquitous coverage reaching devices deep indoors, and ultra-high device connection density for IoT. The three pillars of 5G technologies, enhanced MBB, cMTC, and IoT, extend 5G services vastly to many new use cases. In this talk, we first describe the principles adopted in 5G to achieve its performance objectives. We give an overview of upcoming early deployments, which address MBB primarily. We also give examples of how 5G enables smart city and connected industry. Finally, we discuss the next steps in 5G and what may come beyond 5G.

Date and Time: 
Thursday, February 8, 2018 - 4:30pm
Venue: 
Y2E2 111

SystemX Seminar: Quantum Supremacy

Topic: 
Quantum supremacy: checking a quantum computer with a classical supercomputer
Abstract / Description: 

As microelectronics technology nears the end of exponential growth over time, known as Moore's law, there is a renewed interest in new computing paradigms such as quantum computing. A key step in the roadmap to build a scientifically or commercially useful quantum computer will be to demonstrate its exponentially growing computing power. I will explain how a 7 by 7 array of superconducting xmon qubits with nearest-neighbor coupling, and with programmable single- and two-qubit gate with errors of about 0.2%, can execute a modest depth quantum computation that fully entangles the 49 qubits. Sampling of the resulting output can be checked against a classical simulation to demonstrate proper operation of the quantum computer and compare its system error rate with predictions. With a computation space of 2^49 = 5 x 10^14 states, the quantum computation can only be checked using the biggest supercomputers. I will show experimental data towards this demonstration from a 9 qubit adjustable-coupler "gmon" device, which implements the basic sampling algorithm of quantum supremacy for a computational (Hilbert) space of about 500. We have begun testing of the quantum supremacy chip.

Date and Time: 
Thursday, February 1, 2018 - 4:30pm
Venue: 
Y2E2 111

SystemX Seminar: Using the Stanford Driving Simulator for Human Machine Interaction Studies

Topic: 
Using the Stanford Driving Simulator for Human Machine Interaction Studies
Abstract / Description: 

The driving simulator at Stanford is used for human-in-the-loop, human-machine interaction (HMI) driving studies. Many of the studies focus on shared control between humans and autonomous systems. The simulator’s toolset collects objective driving behavior data directly from the simulator, as well as data streams from eye trackers, cameras and other physiological sensors that we employ to understand human responses to myriad circumstances in the simulated environment.  This presentation will describe the hardware and software associated with the driving studies, what is possible and show some similar labs at other universities. 

Date and Time: 
Thursday, January 25, 2018 - 4:30pm
Venue: 
Y2E2 111

SystemX Seminar: Programmable and Smart Silicon Interposers for 3D Chip Stacks

Topic: 
Programmable and Smart Silicon Interposers for 3D Chip Stacks
Abstract / Description: 

With increased demands for computation and the slowdown of CMOS scaling, alternative methods for further miniaturization of electronics are gaining momentum. Heterogeneous integration (HI) of chips from various manufacturing lines on to a silicon interposer is a newly recognized approach, which has been used in a number of high-performance applications. However, these 3D-IC chip stacks are time-consuming to develop and are application-specific, resulting in prohibitive costs.

Similar cost issues have been addressed in the form of field programmable gate arrays. In an analogous fashion, programmable silicon interposers open new possibilities of design-reuse of silicon for multiple applications, resulting in cost savings and time to market advantages. Programmable re-use of silicon interposers also enables just-in-time manufacturing to simultaneously produce several smaller lots made with high-mix of components.

In addition, programmable silicon interposers for 3D stacking allow system-level control of functions that can be embedded in the interposer, such as power management, built in self-test, and manufacturing defect repair. Power management techniques previously applied to single chip solutions can be re-architected to achieve higher system level efficiency in these 3D chip stack. We will demonstrate one such system built with a smart, programmable silicon interposer from zGlue – the first commercial implementation of a product in this category. This technology will help proliferate internet of things (IoT) devices, give a broader array of choices to product designers, and will accelerate proliferation of electronics in ultra-small form factor for healthcare, industrial as well as consumer space.

Date and Time: 
Thursday, January 18, 2018 - 4:30pm
Venue: 
Y2E2 111

SystemX Seminar: Smart Internet Connections: Your internet connection’s use of artificial intelligence and machine learning

Topic: 
Smart Internet Connections: Your internet connection’s use of artificial intelligence and machine learning
Abstract / Description: 

The next generation of internet communication has many uses for machine learning. This talk will review some of the applications for and types of 5th-generation converged software-defined communication networks, including the important access links to all users/consumers and devices/things, upon which humanity increasing and crucially depends. The general problem well addressed by communications theory is the inference from a large set of data (sometimes called a "channel" output) of a desired/intended conclusion (sometimes called the "channel input" or data "transmitted"); this is sometimes also known as "decoding." Many learning systems like search engines, detection of diseases, facial recognition, etc are all forms of this "decoding." Many of the methods for "machine learning" can be recast in this more general setting, and as well then re-used to advance further the art of next-generation communication. The talk will encourage further investigation into both the "learning" and advancement of the future networks that will increasingly connect us all. Some of these topics will be further examined in EE392AA (spring quarter), which can be used for EE MS Communications Depth sequence.

Date and Time: 
Thursday, January 11, 2018 - 4:30pm
Venue: 
Y2E2 111

SystemX Seminar: Materials and device innovations in the scaling and post-scaling eras

Topic: 
Materials and device innovations in the scaling and post-scaling eras
Abstract / Description: 

With creative innovations and significant technical effort, semiconductor technology scaling is now continuing deeper into nm dimensions. The ultimate lateral dimensions, or ultimate number of layers in 3D stacking may be under debate, but not the fact that there are fundamental or practical (technical and economic) limits to exponential improvements. The industry is already transitioning towards an era in which innovations are enabling advantages for just one or two generations. This talk presents an overview of scaling showing examples of how innovations in materials, devices and design-technology co-optimization enabled scaling and continue to do so towards the 5nm and 3 nm nodes. We also discuss some of the fundamental limits of pitch scaling as well as perspectives on beyond pitch scaling approaches, 3D stacking and heterogeneous and system level integration that will allow to continue to enhance system capabilities, and how emerging applications such as neuromorphic computing impact and drive hardware requirements and development, and open new growth opportunities.

Date and Time: 
Thursday, December 7, 2017 - 4:30pm
Venue: 
Huang 018

SystemX Special Seminar: THz Wireless Communications: New Opportunities and Challenges

Topic: 
THz Wireless Communications: New Opportunities and Challenges
Abstract / Description: 

Ultra-broadband Millimeter (mm) and Terahertz (THz) wireless communication systems are expected to help satisfy the ever-growing need for smaller devices that can offer higher speed wireless communication anywhere and anytime. The large bandwidth paired with higher speed wireless links opens up the door to a large number of novel applications such as 1) ultra-high-speed cellular links, 2) wireless short range communications for ultra-high-speed data transfer, 3) secure wireless communication for military and defense applications, 4) on-body sensors for health monitoring systems. To enable future mm- and THz-range wireless communications for these different applications, it is imperative to understand propagation mechanisms and develop good channel models.

This talk compares propagation characteristics of three frequency bands: 30 GHz (26-40 GHz), 140 GHz (110-170 GHz) and 300 GHz (300-316 GHz), discusses propagation mechanisms that are prevalent at these frequencies and proposes techniques for modeling THz wireless channels.

Date and Time: 
Tuesday, November 28, 2017 - 1:00pm
Venue: 
Packard 202

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