SystemX Seminar: Programmable and Smart Silicon Interposers for 3D Chip Stacks

Programmable and Smart Silicon Interposers for 3D Chip Stacks
Thursday, January 18, 2018 - 4:30pm
Y2E2 111
Jawad Nasrullah (President and Chief Technology Officer, zGlue)
Abstract / Description: 

With increased demands for computation and the slowdown of CMOS scaling, alternative methods for further miniaturization of electronics are gaining momentum. Heterogeneous integration (HI) of chips from various manufacturing lines on to a silicon interposer is a newly recognized approach, which has been used in a number of high-performance applications. However, these 3D-IC chip stacks are time-consuming to develop and are application-specific, resulting in prohibitive costs.

Similar cost issues have been addressed in the form of field programmable gate arrays. In an analogous fashion, programmable silicon interposers open new possibilities of design-reuse of silicon for multiple applications, resulting in cost savings and time to market advantages. Programmable re-use of silicon interposers also enables just-in-time manufacturing to simultaneously produce several smaller lots made with high-mix of components.

In addition, programmable silicon interposers for 3D stacking allow system-level control of functions that can be embedded in the interposer, such as power management, built in self-test, and manufacturing defect repair. Power management techniques previously applied to single chip solutions can be re-architected to achieve higher system level efficiency in these 3D chip stack. We will demonstrate one such system built with a smart, programmable silicon interposer from zGlue – the first commercial implementation of a product in this category. This technology will help proliferate internet of things (IoT) devices, give a broader array of choices to product designers, and will accelerate proliferation of electronics in ultra-small form factor for healthcare, industrial as well as consumer space.


As an expert in low-power and energy-efficient designs for 3D-ICs and high-speed IO, Dr. Jawad Nasrullah's career has spanned a number of roles at some of the top technology companies in the Silicon Valley. As one of zGlue's co-founders, as well as its president and chief technology officer, Nasrullah's role includes technology development and engineering operation. Before co-founding zGlue, Nasrullah was a principal engineer at Samsung where he developed low-power design technologies for use in mobile and server SoCs. Prior to that, he was a hardware architect with Intel for several years, where he was responsible for low-power silicon architecture solutions for 22/14/10nm microprocessors and developed several patent-pending inventions, including on-off keying-based power management technology.

In addition to his stints at Samsung and Intel, he led several teams at Sun, Transmeta, and Innovative Semiconductors. At Transmeta, Nasrullah helped invent the ultra-low power LongRun2 technology. His 20-plus-years career at these respective companies allowed him to work on a number of product lines, including the Intel Core CPU, Sun Rock CPU, Transmeta Efficeon, Transmeta LongRun2, iPod Mini, and many others.

Nasrullah earned his Ph.D. in electrical engineering from Stanford University with an emphasis on ultra-low power technology. He holds 14 U.S. patents issues/pending, and is the recipient of a number of national and institutional awards for academic achievements and commercial contributions. Nasrullah is a senior member of IEEE.