With creative innovations and significant technical effort, semiconductor technology scaling is now continuing deeper into nm dimensions. The ultimate lateral dimensions, or ultimate number of layers in 3D stacking may be under debate, but not the fact that there are fundamental or practical (technical and economic) limits to exponential improvements. The industry is already transitioning towards an era in which innovations are enabling advantages for just one or two generations. This talk presents an overview of scaling showing examples of how innovations in materials, devices and design-technology co-optimization enabled scaling and continue to do so towards the 5nm and 3 nm nodes. We also discuss some of the fundamental limits of pitch scaling as well as perspectives on beyond pitch scaling approaches, 3D stacking and heterogeneous and system level integration that will allow to continue to enhance system capabilities, and how emerging applications such as neuromorphic computing impact and drive hardware requirements and development, and open new growth opportunities.
Jorge A. Kittl is currently Vice President at the Advanced Logic Lab, Samsung, Austin, Texas, in the area of technology pathfinding and roadmap definition for logic. He is also part-time Professor at the Dept. of Physics, KU Leuven, Belgium.
He was Chief Scientist at imec between 2007 and 2012, with scientific responsibility over several areas in logic and memory, with emphasis on introduction of new materials. Research interests included novel memories, resistive RAM, STT-RAM, contacting technologies, gate stacks, high-k dielectrics for DRAM MIMCap and NAND flash.
He was with Texas Instruments from 1993 to 2007, where he held several positions in different areas of R&D, manufacturing and business management. He led the research and development of silicide processes at Texas Instruments which were implemented into manufacturing spanning 7 nodes.
Jorge obtained his M.B.A. degree in 2001 from the University of Texas at Austin and was Director of TI's World Wide Audio business unit. He then returned to R&D and was Texas Instruments on-site manager at imec.
Jorge received his degree of Licenciado en Fisica from the Universidad de Buenos Aires, Argentina, with thesis work on modeling of nuclear reactions. He received his M.Sc. and Ph.D. degrees in Applied Physics from the California Institute of Technology (Caltech) with thesis work on high-Tc superconductor thin films. He was a post-doctoral fellow at Harvard University, Division of Applied Sciences and a visiting scientist at the National Nanofabrication Facility, Cornell University, where he worked on research on pulsed laser induced melting and rapid solidification.
He has authored or co-authored over 200 publications.