Electrostatic discharge (ESD) is physical phenomenon, inescapable in all environments, and particularly harmful to semiconductor devices. As technology features have scaled over the last decades, from micron to nanometer features, designers have to face the reality that ESD risks don't scale, and increased focus is required to minimize the impact of ESD protection on performance and area. This seminar will give a basic introduction to the different ESD threats, from factory to end-use environment. We will explore the design considerations at both IC and system level, on commercial, automotive, IoT and sensor applications. With knowledge about the ESD risks, and the system requirements, co-design is recognized as the pathway to an optimal solution.
This talk is via Zoom only. This is the web address for the audio/video for this class: https://stanford.zoom.us/j/170045505. For the audio, you can use your computer or Telephone: (833) 302-1536 / Webinar ID: 170 045 505
Dr. Ann Concannon is a Distinguished Member of Technical Staff at Texas Instruments, working in the Analog ESD group, with technology development teams, design teams and external customers to engage early on ESD challenges on projects with high visibility on execution and revenue opportunities. As a Marie Curie Fellow in 1996, she worked on joint silicon device development projects with European Industry, including NXP and ST, and led a research group at the Tyndall Institute in Ireland. After joining National Semiconductor in 2000, and subsequently Texas Instruments in 2011, Ann has been based in Santa Clara, CA, USA where she has focused on ESD and Power device SOA. Ann is a senior member of the IEEE, and an active member of the ESDA, with many publications and patents in NVM, Si and ESD. In 2017, Ann was elected to the board of the ESDA, and is a founding member of the Bay Area ESD group; a member of the ESDA education committee and is on the EOS/ESD symposium steering committee.