Almost every subfields of electrical engineering and computer science are undergoing disruptive times. With Moore's Law coming to an end, an expanded roadmap for semiconductors beyond traditional CMOS scaling becomes unclear. At the other end, traditional application software development is being replaced by emerging machine learning techniques whose success will in turn reply on the availability of powerful, efficient and flexible computer systems. Due to these emerging applications, architecture is transitioning from mainstream CPU to heterogeneous and diverse options such as GPU, TPU, etc. The confluence of these key trends has created a wide efficiency gap, due to the mismatch between emerging application requirements and the relatively slow evolutionary improvements in existing CMOS-based computer hardware.
To close the gap, in this talk, I will present a reconfigurable memory-oriented computing fabric, namely Liquid Silicon (L-Si) by leveraging the monolithic 3D stacking capability of RRAM. L-Si addresses several key fundamental limitations of state-of-the-art reconfigurable architectures including FPGA, etc. in supporting emerging data-/search-intensive applications (e.g., machine learning and neural networks) through a series of innovations. It, for the first time, extends the configuration capabilities of existing reconfigurable architectures (FPGA, CGRA) from computation to the whole spectrum, from full memory to full computation, or intermediate states in between (partial memory and partial computation). Thus, it allows users more flexibility in customizing hardware to better match an application's characteristics, for higher performance and energy efficiency. By monolithically integrating RRAM on top of state-of-the-art Si CMOS, a test chip was demonstrated with complete system support (programming languages, runtime, virtualization, API, etc.) to validate the proposed research ideas. Measurement confirmed ultra-low voltage operation (650mV) and multi TOPS/W performance in emerging machine learning applications. The talk will consist of four parts, technology, architecture, compiler tool and algorithm, with a combined EE and CS flavor.
Jing (Jane) Li is a Dugald C. Jackson Assistant Professor in the department of Electrical and Computer Engineering at the University of Wisconsin – Madison. She is also affiliated with Computer Science department. Her research interests include software/hardware co-design for both legacy and emerging applications, with a strong emphasis on real hardware demonstration through architecting, designing, fabricating and testing new hardware prototypes both at chip level and system level. She is the recipient of NSF Career Award in 2018, DARPA's Young Faculty Award in 2016, IBM Research Division Outstanding Technical Achievement Award in 2012 for successfully achieving CEO milestone, multiple invention achievement awards and high value patent application awards from IBM from 2010-2014, etc. She spent her early career at IBM T. J. Watson Research Center as a Research Staff Member after obtaining her PhD degree from Purdue University in 2009.