Special Seminar: Data-Centric Computer Architecture

Topic: 
Data-Centric Computer Architecture
Monday, September 25, 2017 - 4:30pm
Venue: 
Gates 463A
Speaker: 
Dr. Pankaj Mehra (Founder & CEO of AwarenaaS)
Abstract / Description: 

We examine the world of infrastructure (bits, cores, and fabrics) through the lens of data. The talk begins with a survey of data sources, data varieties, and their growth trends. We review the lifecycle of data in order to understand the processes by which data is turned into insightful information. The body of the talk takes a data-centric view of the world and derives a memory-centric computer architecture, in which the primacy of data is reflected in the engineering of infrastructure. We will see that bits, cores and fabrics line up very differently in a memory-centric architecture than in traditional architectures, and even basic operating systems concepts such as virtual memory have a new design.

The talk concludes with a survey of long-term workload and device architecture trends, especially machine learning and memristive devices, and how that aligns with a move to data centricity.

BIO:

Pankaj Mehra is Founder & CEO of AwarenaaS, a context aware computing startup. He has over 20 years of technical experience in architecting and optimizing scalable, intelligent information systems and services, and in designing new memory and storage technologies for persistence and acceleration. Prior to successive acquisitions by SanDisk and Western Digital, Pankaj was SVP and Chief Technology Officer at Fusion-io, where he was named a Top 50 CTO by ExecRank. He has also worked at Hewlett Packard, Compaq, and Tandem, and held academic, research, and visiting positions at NASA Ames, IIT Delhi CS&E, IBM TJ Watson Research Ctr, and UC Santa Cruz. He founded IntelliFabric, Inc. (2001), HP Labs Russia (2006), and Whodini, Inc. (2010), and was a contributing author to InfiniBand 1.0 specification. Pankaj is lead author of Load Balancing: An Automated Learning Approach (Wiley, 1995), lead editor of Artificial Neural Networks: Concepts & Theory (IEEE, 1992), and co-author of Storage, Data, and Information Systems (HP, 2008). He has held TPC-C and Terabyte Sort performance records, and his work was recognized in awards from NASA and Sandia National Labs, among others. Pankaj was appointed Distinguished Technologist at Hewlett-Packard in 2004, and Senior Fellow at SanDisk in 2014. He has served on editorial boards of IEEE Transactions on Computers journal and Internet Computing magazine. Pankaj received Ph.D. degree in Computer Science from The University of Illinois at Urbana-Champaign.