EE Student Information

The Department of Electrical Engineering supports Black Lives Matter. Read more.

• • • • 

 EE Student Information, Spring & Summer Quarters 19-20: FAQs and Updated EE Course List.

Updates will be posted on this page, as well as emailed to the EE student mail list.

Please see Stanford University Health Alerts for course and travel updates.

As always, use your best judgement and consider your own and others' well-being at all times.

EE380 Computer Systems Colloquium presents MIPS Open

Wednesday, May 1, 2019 - 4:30pm
Shriram 104
Majid Bemanian (Wave Computing) and Saraj Mudigonda (Wave Computing)
Abstract / Description: 

During this session, the speakers will provide an overview of Wave Computing's MIPS Open initiative, including details on the program components, how they can be used to design edge SoCs, licensing terms, the design certification process, etc. Mr. Bemanian will also give a demonstration of how to use various program components for real-world example implementations.

Wave Computing released the first MIPS Open program components at the end of March, providing free access to the MIPS RISC architecture without license fees or royalties. The new MIPS Open online environment is live and immediately accessible at Specific components in the first program release include:

  • MIPS Instruction Set Architecture: A downloadable copy of the latest version of the MIPS 32/64-bit ISA, SIMD, DSP, Multithreading and Virtualization
  • MIPS Open Toolsi: Integrated Development Environment for embedded real-time operating systems and Linux-based systems for embedded products
  • MIPS Open FPGAs: A complete training program including labs, SoC tutorials and sample (non-commercial) RTL code
  • MIPS Open Cores: low power, low footprint microAptiv Microprocessor(MPU) and Microcontroller (MCU) cores targeted for embedded applications

Historical Note The MIPS Architecture and processor was originally developed in the Computer Systems Laboratory at Stanford by a team headed by John Hennessey. MIPS and the UC Berkeley developed SPARC archicture were quintessential RISC architectures: influential, popular, and heavily studied.


Saraj Mudigonda is Director of MIPS Open Marketing at Wave Computing, responsible for driving Wave's MIPS Open initiative. Previously he was a Director of Segment Marketing for IoT and Modem market segments at Imagination Technologies/MIPS and product/program manager for Imagination's HelloSoft Voice and Video products. He has 15 years of experience in the telecommunication industry in Wireless LAN, V.VoIP, and started his career as a DSP (Digital Signal Processing) engineer developing, implementing, and optimizing the assembly code for several DSP architectures. He also managed multiple V.VoIP customer projects and was the primary liaison between customers and engineering teams. He holds Masters in Electronics Engineering and MBA in Marketing.

Majid Bemanian is Sr.Director, Solutions Architect at Wave Computing, responsible for driving MIPS and AI technologies. Previously he was a Director of Marketing for Imagination, responsible for driving the company's strategic security initiatives and leading its market strategy for the networking and storage segments. He also co-chairs the prpl Foundation's security working group, focused on developing open standards and APIs around next-generation embedded security solutions. Prior to joining Imagination in 2013, Mr. Bemanian was Director of Marketing for the Processor Business Unit at AppliedMicro. He has more than 30 years of high-tech industry experience with hands-on engineering, marketing and business management skills. Bemanian has held key management positions with Amdahl Communications, Ascom-Timeplex, Encore Video, Raytheon Semi, LSI Logic, AppliedMicro and many early-stage startups. He holds several patents and a B.S. degree in Electrical Engineering from the University of Nevada, Reno.