EE380 Computer Systems Colloquium: Low-Cost 3D Chip Stacking with ThruChip Wireless Connections

image of Dave Ditzel, ThruChip Communications
Low-Cost 3D Chip Stacking with ThruChip Wireless Connections
Wednesday, October 22, 2014 - 4:15pm to 5:30pm
Gates B03
Dave Ditzel (ThruChip Communications)
Abstract / Description: 

Stacking thinned chips in 3D would enable a dramatic increase in density, but so far there has been limited market acceptance with current stacking techniques. Most chip stacking so far has been for FLASH memories, where die are thinned to 40-50 microns and stacked in a staircase fashion to allow wire bonding for data and power. Wire bonding suffers from high IO power, low bandwidths and becomes challenging when stacking more than a few chips. Thru-Silicon-Vias (TSV) have been the presumed direction for 3D stacking as TSVs have much better electrical characteristics than wire bonds, allowing a lowering of IO power and increased bandwidths. TSVs provide for a solid metal via directly through a thinned silicon die. However TSVs have proved to be very expensive, often around a 50% or more cost increase over unstacked die. This includes the costs coming from the need for a special CMOS process for the TSV's as well as yield fallout from 3D assembly. Customers are often only willing to pay a few percent increase for additional technical capabilities, and hence the move to 3D with TSV has stalled.

ThruChip Communications proposes a new way to stack ultra-thin die that has the potential provide the main technical advantages of TSV's, and rather than a cost increase, it may even provide a cost decrease compared to unstacked die. Data is communicated wirelessly between chips using near-field inductive coupling in a standard CMOS process, to establish a wireless ThruChip Interconnect (TCI). Multiple TCI links can be operated in parallel to achieve net bandwidths exceeding tens of terabytes/second. Energy costs to communicate between die can be made extremely low power, and have been demonstrated at 10 fJ/bit, about the same as driving an on-die wire. Power distribution with ultra-thin stacked die can also be done without the need for TSV's, by highly doping the silicon in desired regions, to create low-resistance front to back connections suitable for power. The result is a way to transmit both data and power in 3D at low cost.

To learn more, see

Dave Ditzel is the president and CEO of ThruChip Communications. ThruChip develops technologies using near-field wireless data communication to reduce the costs of 3D chip stacking.

Prior to becoming CEO of ThruChip, Dave spent six years as a Vice President and Chief Architect for Hybrid Computing at Intel Corporation, where he led a team that developed a multi-ISA next generation processor architecture using binary translation. Dave was a co-founder low-power x86-compatible chip maker Transmeta Corporation, and served as its CEO from March 1995 to its successful IPO. He spent ten years at Sun Microsystems as CTO of the SPARC Technology Business, Director of Advanced Systems and acting director of Sun Labs. Prior to Sun he worked for ten years at AT&T Bell Labs in Murray Hill, New Jersey, where he was the architect for the CRISP Microprocessor, one of first RISC processors, and he was a co-author of "The Case for the Reduced Instruction Set Computer." Dave has worked on the development of over two dozen computer systems, has published three dozen papers on advanced computer design and has received 10 patents.