EE380 Computer Systems Colloquium: Instructions Sets Should Be Free: The Case for RISC-V

image of EE Computer System Colloquium speakers
Topic: 
Instructions Sets Should Be Free: The Case for RISC-V
Wednesday, October 15, 2014 - 4:15pm to 5:30pm
Venue: 
Gates B03
Speaker: 
Krste Asanović and David Patterson, UC Berkeley
Abstract / Description: 

The increasing popularity today of systems on a chip, where processors are just part of the design, calls into question why one of the most important interfaces is proprietary. We argue that:

  • There is no good technical reason not to have free, open instruction sets just as we have free, open networking standards and free, open operating systems.
  • The most likely first targets for a free, open instruction set are systems on a chip for the Internet of Things, which have low cost and power demands, and for Warehouse Scale Computers, which could benefit from viable alternatives to the 80x86 instruction set
  • The best architectural style for a free, open instruction set is RISC.
  • Given the time it takes to design an instruction set, it makes more sense to adopt an existing RISC free, open instruction set than to design a new one from scratch.
  • Among the existing RISC free, open instruction sets, RISC-V is the best and safest choice.

Krste Asanović is a Professor in the Computer Science Divisions of the EECS Department at the University of California, Berkeley. His main research areas are computer architecture, VLSI design, parallel programming and operating system design. He is the Director of the new ASPIRE lab tackling the challenge of improving computational efficiency now that transistor scaling is ending. ASPIRE builds upon the earlier success of the Par Lab, whose goal was to make parallel programming accessible to most programmers. He is also an Associate Director at the Berkeley Wireless Research Center, and holds a joint appointment with the Lawrence Berkeley National Laboratory. Previously at MIT, he led the SCALE group, investigating advanced architectures for energy-efficient high-performance computing.


David Patterson is the Pardee Professor of Computer Science at the University of California at Berkeley, which he joined after graduating from UCLA in 1977.

Dave's research style is to identify critical questions for the IT industry and gather inter-disciplinary groups of faculty and graduate students to answer them. The answer is typically embodied in demonstration systems, and these demonstration systems are later mirrored in commercial products. In addition to research impact, these projects train leaders of our field. The best known projects were Reduced Instruction Set Computers (RISC), Redundant Array of Inexpensive Disks (RAID), and Networks of Workstations (NOW), each of which helped lead to billion dollar industries.

A measure of the success of projects is the list of awards won by Patterson and as his teammates: the C & C Prize, the IEEE von Neumann Medal, the IEEE Johnson Storage Award, the SIGMOD Test of Time award, the ACM-IEEE Eckert-Mauchly Award, and the Katayanagi Prize. He was also elected to both AAAS societies, the National Academy of Engineering, the National Academy of Sciences, the Silicon Valley Engineering Hall of Fame, and to be a Fellow of the Computer History Museum. The full list includes about 35 awards for research, teaching, and service.

In his spare time he coauthored six books, including two with John Hennessy, who is President of Stanford University. Patterson also served as Chair of the Computer Science Division at UC Berkeley, Chair of the Computing Research Association, and President of ACM.