After decades of relatively static storage latency, high performance devices like SSDs have burst onto the scene. But even with SSDs, storage performance is still a bottleneck in many computer systems. Storage Class Memory promises much faster media, and with 3D Xpoint™ technology, the first storage class memory is entering production. But fast media is not enough. The continuing quest for low storage latency changes nearly everything in computing platforms, from IO bus protocols to new instruction sets. This talk will review the history of storage performance and the compute platform changes driven by SCM (3D Xpoint Technology as an example) and the drive for lower storage latency.
The Stanford EE Computer Systems Colloquium (EE380) meets on Wednesdays 4:30-5:45 throughout the academic year. Talks are given before a live audience in Room B03 in the basement of the Gates Computer Science Building on the Stanford Campus. The live talks (and the videos hosted at Stanford and on YouTube) are open to the public.
Richard L. Coulson is an Intel Senior Fellow and director of the Storage Technologies Group (STG) at Intel Corporation. STG is a technology research and pathfinding organization focused on guiding future industry direction of data storage. Coulson's career passion has been to break the storage performance bottleneck and improve the Intel platform through enhanced storage.
While at Intel, he built the industry consortium that drove the SATA (serial ATA) bus interface standard. Together with industry partners, he and his team designed and developed the interface. SATA enables higher performance and superior cabling versus prior architectures. Greater than one billion SATA connections ship annually.
Coulson drove Intel's vision for solid state disk (SSD) and non-volatile storage caches, the culmination of a 15-year quest to alleviate the storage performance bottleneck in PC systems and provide a more effective user experience. Moving forward, Coulson and his team are driving greater use of storage caches and solutions suitable for ultrabooks and smaller form factor devices. He and his team continue to drive platform improvements based on enhanced storage capabilities.
Coulson has been awarded the Intel Achievement Award four times for his and his team's work on storage subsystems and SSD technology. He holds more than 40 Patents.
From 1983 to 1987, Coulson worked in various senior and staff engineering roles at Intel. From 1988 to 1993, he worked as an I/O engineering manager with BiiN (Intel/Siemens joint venture) and subsequently with Sequent Computer Systems. He rejoined Intel in 1993 as manager of the I/O Architecture Group, Platform Architecture Labs. In 1997, he was named an Intel Fellow and then Senior Fellow in 2006.
Coulson received his bachelor's degree in Electrical Engineering and Computer Science from University of Colorado in 1980 and his master's degree in Electrical Engineering from Stanford in 1983. He is an avid pilot (instrument-rated) and enjoys developing future business and technology leaders.