||C. Debaes, D. Agarwal, A. Bhatnagar, H.
Thienpont, and D. A. B. Miller, "High-Impedance High-Frequency
Silicon Detector Response for Precise Receiverless Optical Clock
Injection," in SPIE Photonics West 2002 Meeting, San Jose,
California, Proc. SPIE Vol. 4654, 78-88
We report the direct
injection of precise clock signals into standard CMOS circuits using
short optical pulses by a novel receiverless scheme that eliminates
the delay, skew and jitter of a typical receiver. To accomplish the
optical injection we designed small silicon detectors along-side
standard 0.25 micron CMOS circuits. Due to the low intrinsic
capacitance of the detectors, the photogenerated carriers can directly
generate voltage swings that are comparable with CMOS voltage levels
if the detectors are loaded with high-impedance circuits.
As a first step to implement this scheme we characterized various
detectors built in the CMOS process for their high-frequency response.
In a test set-up the silicon detectors are sampled with on-chip samplers
that only present a small capacitive loading to the detector node. we
present the high-frequency high-impedance response measured with this
scheme together with capacitance measurements and DC responsivities of
various types and sizes of detectors. The characterized long tails
typically observed with silicon detectors allowed us to set up a model
for the power penalty we have to take into account for precise
Finally, as a proof-of-principle demonstration we present the first
results of this receiverless scheme in which a totem-pole of silicon detectors
directly drives an on-chip CMOS inverter.
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